Overview of methodologies for building ontologies

A few research groups are now proposing a series of steps and methodologies for developing ontologies. However, mainly due to the fact that Ontological Engineering is still a relatively immature discipline, each work group employs its own methodology. Our goal is to present the most representative methodologies used in ontology development and to perform an analysis of such methodologies against the same framework of reference. So, the goal of this paper is not to provide new insights about methodologies, but to put it all in one place and help people to select which methodology to use

Inner Ideals of Simple Locally Finite Lie Algebras

Inner ideals of simple locally finite dimensional Lie algebras over an algebraically closed field of characteristic 0 are described. In particular, it is shown that a simple locally finite dimensional Lie algebra has a non-zero proper inner ideal if and only if it is of diagonal type. Regular inner ideals of diagonal type Lie algebras are characterized in terms of left and right ideals of the enveloping algebra. Regular inner ideals of finitary simple Lie algebras are described

Quid Pro Quo: A Mechanism for Fair Collaboration in Networked Systems

Collaboration may be understood as the execution of coordinated tasks (in the most general sense) by groups of users, who cooperate for achieving a common goal. Collaboration is a fundamental assumption and requirement for the correct operation of many communication systems. The main challenge when creating collaborative systems in a decentralized manner is dealing with the fact that users may behave in selfish ways, trying to obtain the benefits of the tasks but without participating in their execution. In this context, Game Theory has been instrumental to model collaborative systems and the task allocation problem, and to design mechanisms for optimal allocation of tasks. In this paper, we revise the classical assumptions and propose a new approach to this problem. First, we establish a system model based on heterogenous nodes (users, players), and propose a basic distributed mechanism so that, when a new task appears, it is assigned to the most suitable node. The classical technique for compensating a node that executes a task is the use of payments (which in most networks are hard or impossible to implement). Instead, we propose a distributed mechanism for the optimal allocation of tasks without payments. We prove this mechanism to be robust event in the presence of independent selfish or rationally limited players. Additionally, our model is based on very weak assumptions, which makes the proposed mechanisms susceptible to be implemented in networked systems (e.g., the Internet).Comment: 23 pages, 5 figures, 3 algorithm

On the uniqueness of the helicoid and Enneper’s surface in the Lorentz-Minkowski space R31

In this paper we deal with the uniqueness of the Lorentzian helicoid and Enneper’s surface among properly embedded maximal surfaces with lightlike boundary of mirror symmetry in the Lorentz-Minkowski space R3Ministerio de Ciencia y Tecnología MTM2004-00160Ministerio de Ciencia y Tecnología MTM2007-61775Junta de Andalucía P06-FQM-01642Junta de Andalucía FQM32

Resource location based on precomputed partial random walks in dynamic networks

The problem of finding a resource residing in a network node (the \emph{resource location problem}) is a challenge in complex networks due to aspects as network size, unknown network topology, and network dynamics. The problem is especially difficult if no requirements on the resource placement strategy or the network structure are to be imposed, assuming of course that keeping centralized resource information is not feasible or appropriate. Under these conditions, random algorithms are useful to search the network. A possible strategy for static networks, proposed in previous work, uses short random walks precomputed at each network node as partial walks to construct longer random walks with associated resource information. In this work, we adapt the previous mechanisms to dynamic networks, where resource instances may appear in, and disappear from, network nodes, and the nodes themselves may leave and join the network, resembling realistic scenarios. We analyze the resulting resource location mechanisms, providing expressions that accurately predict average search lengths, which are validated using simulation experiments. Reduction of average search lengths compared to simple random walk searches are found to be very large, even in the face of high network volatility. We also study the cost of the mechanisms, focusing on the overhead implied by the periodic recomputation of partial walks to refresh the information on resources, concluding that the proposed mechanisms behave efficiently and robustly in dynamic networks.Comment: 39 pages, 25 figure

Is the bulbus arteriosus of fish homologous to the mamalian intrapericardial thoracic arteries?

El resumen aparece en el Program & Abstracts of the 10th International Congress of Vertebrate Morphology, Barcelona 2013.Anatomical Record, Volume 296, Special Feature — 1: P-089.Two major findings have significantly improved our understanding of the embryology and evolution of the arterial pole of the vertebrate heart (APVH): 1) a new embryonic presumptive cardiac tissue, named second heart field (SHF), forms the myocardium of the outflow tract, and the walls of the ascending aorta (AA) and the pulmonary trunk (PT) in mammals and birds; 2) the bulbus arteriosus (BA), previously thought to be an actinopterygian apomorphy, is present in all basal Vertebrates, and probably derives from the SHF. We hypothesized that the intrapericardial portions of the AA and the PT of mammals are homologous to the BA of basal vertebrates. To test this, we performed 1) a literature review of the anatomy and embryology of the APVH; 2) novel anatomical, histomorphological, and embryological analyses of the APVH, comparing basal (Galeus atlanticus), with apical (Mus musculus and Mesocricetus auratus) vertrebrates. Evidence obtained: 1) Anatomically, BA, AA, and PT are muscular tubes into the pericardial cavity, which connect the distal myocardial outflow tracts with the aortic arch system. Coronary arteries run through or originate at these anatomical structures; 2) Histologically, BA, AA, and PT show an inner layer of endothelium covered by circumferentially oriented smooth muscle cells, collagen fibers, and lamellar elastin. The histomorphological differences between the BA and the ventral aorta parallel those between intrapericardial and extrapericardial great arteries; 3) Embryologically, BA, AA, and PT are composed of smooth muscle cells derived from the SHF. They show a similar mechanism of development: incorporation of SHF‐derived cells into the pericardial cavity, and distal‐to‐proximal differentiation into an elastogenic cell linage. In conclusion, anatomical, histological and embryological evidence supports the hypothesis that SHF is a developmental unit responsible for the formation of the APVH. The BA and the intrapericardial portions of the great arteries must be considered homologous structures.Proyecto P10-CTS-6068 (Junta de Andalucía); proyecto CGL-16417 (Ministerio de Ciencia e Innovación); Fondos FEDER

Geometrically-constrained, parasitic-aware synthesis of analog ICs

In order to speed up the design process of analog ICs, iterations between different design stages should be avoided as much as possible. More specifically, spins between electrical and physical synthesis should be reduced for this is a very time-consuming task: if circuit performance including layout-induced degradations proves unacceptable, a re-design cycle must be entered, and electrical, physical, or both synthesis processes, would have to be repeated. It is also worth noting that if geometric optimization (e.g., area minimization) is undertaken after electrical synthesis, it may add up as another source of unexpected degradation of the circuit performance due to the impact of the geometric variables (e.g., transistor folds) on the device and the routing parasitic values. This awkward scenario is caused by the complete separation of said electrical and physical synthesis, a design practice commonly followed so far. Parasitic-aware synthesis, consisting in including parasitic estimates to the circuit netlist directly during electrical synthesis, has been proposed as solution. While most of the reported contributions either tackle parasitic-aware synthesis without paying special attention to geometric optimization or approach both issues only partially, this paper addresses the problem in a unified way. In what has been called layout-aware electrical synthesis, a simulation-based optimization algorithm explores the design space with geometric variables constrained to meet certain user-defined goals, which provides reliable estimates of layout-induced parasitics at each iteration, and, thereby, accurate evaluation of the circuit ultimate performance. This technique, demonstrated here through several design examples, requires knowing layout details beforehand; to facilitate this, procedural layout generation is used as physical synthesis approach due to its rapidness and ability to capture analog layout know-how.Ministerio de Educación y Ciencia TEC2004-0175

A Reuse-based framework for the design of analog and mixed-signal ICs

Despite the spectacular breakthroughs of the semiconductor industry, the ability to design integrated circuits (ICs) under stringent time-to-market (TTM) requirements is lagging behind integration capacity, so far keeping pace with still valid Moore's Law. The resulting gap is threatening with slowing down such a phenomenal growth. The design community believes that it is only by means of powerful CAD tools and design methodologies -and, possibly, a design paradigm shift-that this design gap can be bridged. In this sense, reuse-based design is seen as a promising solution, and concepts such as IP Block, Virtual Component, and Design Reuse have become commonplace thanks to the significant advances in the digital arena. Unfortunately, the very nature of analog and mixed-signal (AMS) design has hindered a similar level of consensus and development. This paper presents a framework for the reuse-based design of AMS circuits. The framework is founded on three key elements: (1) a CAD-supported hierarchical design flow that facilitates the incorporation of AMS reusable blocks, reduces the overall design time, and expedites the management of increasing AMS design complexity; (2) a complete, clear definition of the AMS reusable block, structured into three separate facets or views: the behavioral, structural, and layout facets, the two first for top-down electrical synthesis and bottom-up verification, the latter used during bottom-up physical synthesis; (3) the design for reusability set of tools, methods, and guidelines that, relying on intensive parameterization as well as on design knowledge capture and encapsulation, allows to produce fully reusable AMS blocks. A case study and a functional silicon prototype demonstrate the validity of the paper's proposals.Ministerio de Educación y Ciencia TEC2004-0175